47
1745D–ATARM–04-Nov-05
AT91M55800A
Figure 11-25. 0 Wait States, 16-bit Bus Width, Byte Transfer
MCK
A1-A23
NCS
NWR1
D0-D15
X B
1
B
2
X
ADDR
X X X
0 ADDR X X X 0
ADDR X X X 0 ADDR X X X 1
Internal Address
Internal Bus
X X X B
1
X X B
2
X
NLB
NUB
READ ACCESS
· Standard Protocol
NRD
· Early Protocol
NRD
D0-D15
XB
1
B
2
X
WRITE ACCESS
NWR0
D0-D15
B
1
B
1
B
2
B
2
·
Byte Write Option
·
Byte Select Option
NWE