46
1745D–ATARM–04-Nov-05
AT91M55800A
Figure 11-24. 1 Wait State, 8-bit Bus Width, Byte Transfer
XB
1
1 Wait State
MCK
A0 - A23
NCS
NRD
D0-D15
Internal Bus
X X X B
1
READ ACCESS
· Standard Protocol
· Early Protocol
D0 - D15
X B
1
WRITE ACCESS
NWR0
D0-D15
X B
1
NRD
NWR1