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PicoBlaze 8-bit Embedded Microcontroller www.xilinx.com 45
UG129 (v1.1.2) June 24, 2008
R
Chapter 5
Scratchpad RAM
The PicoBlaze™ microcontroller contains a 64-byte scratchpad RAM. Two instructions,
STORE and FETCH, move data between any data register and the scratchpad RAM. Both
direct and indirect addressing are supported. The scratchpad RAM is only supported on
PicoBlaze microcontrollers for Spartan
®
-3, Virtex
®
-II, and Virtex-II Pro FPGAs.
The scratchpad RAM is unaffected by a RESET Event.
Address Modes
The STORE and FETCH instructions support both direct and indirect addressing modes to
access scratchpad RAM data.
Direct Addressing
An immediate constant value directly addresses a specific scratchpad RAM location. In the
example in Figure 5-1, register sX directly writes to and reads from scratchpad RAM
location 04.
Indirect Addressing
Using indirect address, the actual RAM address is the value contained in a specified
register. Whereas direct addressing requires the RAM address to be known before
assembly, indirect addressing provides additional program flexibility. The application
code can compute or modify the RAM address based on other program data. The code in
Figure 5-2, for example, initializes all the scratchpad RAM locations to 0 using a simple
loop.
Figure 5-1: Directly Addressing Scratchpad RAM Locations
scratchpad_transfers:
STORE sX, 04 ; Write register sX to RAM location 04
FETCH sX, 04 ; Read RAM location 04 into register sX