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42 www.xilinx.com PicoBlaze 8-bit Embedded Microcontroller
UG129 (v1.1.2) June 24, 2008
Chapter 4: Interrupts
R
A special RETURNI command ensures that the end of an interrupt service routine restores
the status of the flags and controls the enable of future interrupts. When the RETURNI
instruction is executed, the PC values saved onto the CALL/RETURN stack is
automatically reloaded to the PC register. Likewise, the ZERO and CARRY flags are
restored and program flow returns to the instruction following the instruction where the
interrupt occurred.
If the application does not require an interrupt, tie the INTERRUPT signal Low.
Consequently, all 1,024 instruction locations are available.
Example Interrupt Flow
Figure 4-2 shows an example program flow during an interrupt event.
1. By default, the INTERRUPT input is disabled. The ENABLE INTERRUPT instruction
must execute before the interrupt is recognized.
2. In this example, interrupts are enabled and the PicoBlaze microcontroller is executing
the INPUT s1,01 instruction. Simultaneously to executing this instruction, an
interrupt arrives on the INTERRUPT input. The PicoBlaze microcontroller does not act
on the interrupt until it finishes executing the INPUT s1, 01 instruction.
Figure 4-2: Example Interrupt Flow
The interrupt input is not
recognized until the
INTERRUPT_ENABLE flag is set.
In timing-critical functions or areas
where absolute predictability is
required, temporarily disable the
interrupt. Re-enable the interrupt
input when the time-critical function
is complete.
Always return from a sub-routine
call with the RETURN instruction.
The interrupt vector is always
located at the most-significant
memory location, where all the
address bits are ones. Jump to the
interrupt service routine.
The interrupt input is automatically
disabled.
Use the RETURNI instruction to
return from an interrupt.
INTERRUPT
input
asserted.
ADDRESS 000
main:
ENABLE INTERRUPT
INPUT s0, 00
INPUT s1, 01
ADD s0, s1
OUTPUT s0, 00
CALL critical_timing
JUMP main
critical_timing: DISABLE INTERRUPT
ENABLE INTERRUPT
RETURN
isr: TEST s7, 02
RETURNI ENABLE
ADDRESS 3FF
JUMP isr
2
1
6
3
4
5
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