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34 www.xilinx.com PicoBlaze 8-bit Embedded Microcontroller
UG129 (v1.1.2) June 24, 2008
Chapter 3: PicoBlaze Instruction Set
R
The example in Figure 3-25 demonstrates how to generate parity for all eight bits in a
register.
See also “TEST sX, Operand — Test Bit Location in Register sX, Generate Odd Parity,” page
116.
Compare
The COMPARE instruction performs an 8-bit subtraction of two operands but only affects
the ZERO and CARRY flags, as shown in Table 3-3. No registers are modified.
The ZERO flag is set when both input operands are identical. When set, the CARRY flag
indicates that the second operand is greater than the first operand.
See also “COMPARE sX, Operand — Compare Operand with Register sX,” page 96.
Shift and Rotate Instructions
Shift
The PicoBlaze microcontroller supports a rich set of shift instructions, summarized in
Table 3-4, that modify the contents of a single register. All shift instructions affect the
CARRY and ZERO flags.
The SL0 sX instruction shift the contents of register sX left by one bit position. The most-
significant bit, bit 7, shifts into the CARRY flag. The least-significant bit position is filled
with a ‘0’. The SR0 instruction is similar except the least-significant bit, bit 0, shifts into the
CARRY flag and the most-significant bit is filled with a ‘0’.
The SL1 and SR1 shift instructions are similar to SL0 and SR0 except that the empty bit
location is filled with a ‘1’. The ZERO flag is always ‘0’ when using SL1 and SR1 because
there is always a ‘1’ shifted into the affected register, making the register non-zero.
The SRX sX instruction performs an arithmetic shift right operation and sign extends
register sX, preserving the sign bit. The most-significant bit, bit 7, is unaffected during the
shift operation and is copied back into bit 7. The SLX sX instruction is similar but shifts the
register sX contents to the left, replicating bit 0 and filling the register with the bit 0 value.
The SLA sX instruction left shifts the contents of register sX through the CARRY bit, the
CARRY bit feeding back into the least-significant bit, bit 0, of register sX. The SRA sX
instruction is similar to SLA but with a right shift.
Figure 3-25: Generate Parity for a Register Using the TEST Instruction
generate_parity:
TEST sX, FF ; include all bits in parity generation
Table 3-3: COMPARE Instruction Flag Operations
Flag When Flag=0 When Flag=1
ZERO Operand_1 ≠ Operand_2 Operand_1 = Operand_2
CARRY Operand_1 >
Operand_2 Operand_1 < Operand_2