Nortel Networks RTU-292 Telephone User Manual


 
RTU-292 Operations Manual
Bus drivers U60 and U61 are the input devices for the front panel switches; latches U62 and
U63 light the front panel LEDs. Latches U50 through U53 send control signals mainly to the
audio circuit sections. U56 and U57 send inputs to the data bus; U54 and U55 read Option
switches SW1 and SW2. Keypad decoder chip U59 provides the keyboard interrupt and
translates keypad closures before sending them onto the data bus via latch U58.
4.3.9 PROMPT TONE GENERATOR
Timer IC U30 can create tones of 500, 600, 750 or 1kHz, depending on the states of control
signals from the CPU Board DT0 and DT1. The volume of these prompts may be adjusted via
potentiometer R158. U33B, U33C, and U33D route either tone prompt or voice prompt signals
to the circuitry; controlled by the T/V signal from the CPU.
4.4 OPTION INTERFACE BOARD
This board contains the basic databus, power audio, and control lines to operate the various
options that may be installed on the unit on the options tray. See figure 8-4.
4.5 VOICE PROMPT OPTION
The Voice Prompt Option outputs prerecorded voice prompts into the telephone send signal or
into the radio transmit audio output from the RTU-292. See figure 8-5.
4.5.1 SPEECH PROCESSOR
The heart of the voice prompt option board is the speech processor chip, U7. This chip is an
ADPCM (Adaptive Pulse Code Modulation) processor containing built-in A/D and D/A, and
can be used for recording as well as playback. The digitized voice prompts are contained in
EPROM U5, which U7 accesses via data bus AD. The prompt analog audio is output on U7-28
and is passed through amplifiers U9 and U10. These amplifiers are arranged as a five-pole
active low-pass filter which removes remnants of the 8 kHz sampling frequency from the
output audio.
4.5.2 CONTROL PROCESSOR
The control microprocessor is the 68HC11A0, an 8-bit processor running at 8 MHz with a basic
instruction cycle time of 2 microseconds. There is some I/O from the processor chip itself from
Port D (pins 20 to 25) and Port A (pins 27 to 34) which controls the Audio Processor chip. The
control input to the board is to Port E (Pins 43 to 50) from connector J1. The lower eight bits
of the address bus are separated from the data bus by address latch U2.
EPROM U4 is the program memory, a 27C256 providing 16k of address space.
Chip select signals for the various I/O are provided by PEEL U6.
Several devices on the CPU board use a 3.58 MHz clock signal that is provided by crystal Y2
and gates U12B and U12C.
U3 is a reset generator that ensures an orderly power-up sequence for the microprocessor and
associated components. It senses the voltage on the +5V line and generates a reset while the
voltage is below approximately 4.55V. As the voltage rises above the threshold, a delay is
generated by C4 to insure processor clock stability before operation commences. Resistor R5
prevents resetting on short spikes on the 5V line.
JPS Communications, Inc.
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